1. Technical Field
The present invention relates to semiconductor integrated circuits (ICs), and more particularly, to apparatuses and methods for improving the area efficiency and the power efficiency in semiconductor ICs.
2. Related Art
Recently, semiconductor ICs have tended toward high-speed, high-integration and mass-storage. In order to realize such advanced semiconductor ICs, various advanced technologies have been suggested. For instance, a multi-level transmission technology has been extensively used as an information transmission technology. In multi-level transmission apparatus, information having a plurality of bits can be transmitted as a one-bit data signal. The multi-bit transmitted information is decoded from the one bit data signal based on a signal level thereof. That is, unlike prior technology in which a single bit of data can only convey one of two discrete signal levels, i.e., high and low, multi-level transmission technology allows a single bit of data to convey a plurality of signal levels, e.g., 4 signal levels. Accordingly, such multi-level transmission apparatus exhibit improved information transmission speeds.
Conventional signal receiver circuits used for implementing such a multi-level transmission approach include a preamplifier and a regenerative amplifier having resistors that occupy a relatively large space. Consequently, the area efficiency for such apparatuses is reduced. Additionally, since conventional signal receiver circuit has a plurality of electric elements, a large amount of power is required to drive the electric element. Thus, power consumption is increased and the performance of the semiconductor IC is degraded. There presently is no means for solving the problems of conventional signal receiver circuit when implementing multi-level transmission.